FAULT TOLERANT MEMORY SYSTEM WITH ACTIVE REDUNDANCY FOR CRITICAL APPLICATIONS - Cascaval, Petru; Cascaval, Doina (International Journal of Computing, 2014)
This paper proposes a fault tolerant RAM memory architecture with active redundancy dedicated to critical applications. To assure high reliability, additional modules are provided in the system. To reach a high safety, memory system is composed by built-in self-testing RAM devices (BIST?RAM). Memory modules are tested online one by one, in a sequential order, during the normal operation. A primary module under testing is temporary replaced by another one. If one module is diagnosed as being failed it is eliminated from the system automatically and replaced with a spare module. The memory control unit responsible for performing the reconfiguration of the memory system has a cellular structure and introduces an acceptable extra delay for the memory access.