DETECTION METHOD OF THE PROBABLE INTEGRITY VIOLATION AREAS IN FPGA-BASED SAFETY-CRITICAL SYSTEMS

Authors

  • Kostiantyn Zashcholkin
  • Oleksandr Drozd
  • Yulian Sulima
  • Olena Ivanova
  • Ihor Perebeinos

Keywords:

LUT-oriented architecture, FPGA, hardware Trojans, safety-critical systems, integrity monitoring.

Abstract

The features of integrity monitoring of FPGA-based safety-critical systems are considered. Hardware Trojans are distinguished as one of the most dangerous types of malicious integrity violation of FPGA-based systems. The study has proved that Hardware Trojans can be implanted into the system (or system project) during its planned modification. In particular, it happens when the integrity monitoring, based on the hash sum usage, does not operate. Before running the integrity monitoring, one should ensure that Hardware Trojans were not implanted. Authors proposed the method for detecting the hardware Trojans location in the space of FPGA-based components of safety-critical systems. The method is based on the analysis of addressing to the values of calculated LUT units for these components in the normal and emergency modes of system operation. The hardware module for addressing the registration in accordance with the proposed method is implemented.

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Published

2020-06-14

How to Cite

Zashcholkin, K., Drozd, O., Sulima, Y., Ivanova, O., & Perebeinos, I. (2020). DETECTION METHOD OF THE PROBABLE INTEGRITY VIOLATION AREAS IN FPGA-BASED SAFETY-CRITICAL SYSTEMS. International Journal of Computing, 19(2), 282-289. Retrieved from http://computingonline.net/computing/article/view/1772

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