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X-MATCHPRO: A HIGH PERFORMANCE FULL-DUPLEX LOSSLESS DATA COMPRESSOR ON A PROASIC FPGA

Jose Luis Nunez, Simon Jones, Stephen Bateman

Abstract


This paper presents the full­duplex architecture of the X­MatchPRO lossless data compressor and its highly integrated implementation in a non­volatile reprogrammable ProASIC FPGA. The X­MatchPRO architecture offers a data independent throughput of 100 Mbytes/s and simultaneous compression/decompression for a combine full­duplex performance of 200 Mbytes/s clocking at 25 MHz. Both compression and decompression channels fit into a single A500K130 ProASIC FPGA with a typical compression ratio that halves the original uncompressed data. This device is specifically targeted to enhance the performance of Gbit/s data networks and storage applications where it can double the performance of the original system.

Keywords


Lossless; compression; network; storage; FPGA

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