DIRECT DIGITAL FREQUENCY SYNTHESIZER IN THE RESIDUE NUMBER SYSTEM
DOI:
https://doi.org/10.47839/ijc.18.3.1523Keywords:
RNS, Adder, DDS, CORDIC, CRT.Abstract
The principles of construction and operation of direct digital frequency synthesizers are considered in order to speed up computational operations using Residue Number System. The problems of forming the output signals are considered. The specifics of the implementation of the operation of direct and reverse transformations from positional to non-positional number systems are described. A mathematical model of a synthesizer with a phase accumulator in a Residue Number System is considered. Methods for converting from RNS (Residue Number System) to binary system for problematic operations are considered. The design of a DDS (Direct Digital Synthesizer) with a phase accumulator in a Residue Number System and a converter to an analogue signal form is proposed without the use of slow ROM (Read Only Memory). The article deals with the issues of efficiency of the crystal area of the synthesizer and the reduction of the delays in the formation of the output signal.References
B.-D. Yang, J.-H. Choi, S.-H. Han, “An 800-MHz low-power direct digital frequency synthesizer with an on-chip D/A converter,” IEEE Journal of Solid-State Circuits, vol. 39, no. 5. pp. 761-774, 2004.
Y. Song, B. Kim, “Quadrature direct digital frequency synthesizer using interpolation based angle rotation,” IEEE Transaction on Very Large–Scale Integration, (VLSI) Systems, vol. 12, no. 7, pp. 701–710, 2004.
D. Zuras, W.H. McAllister, “Balanced delay trees and combinatorial division in VLSI,” IEEE J. Solid–State Circuits, vol. 21, no. 5, pp. 814–819, 1986.
P.V. Ananda Mohan, Residue Number Systems. Theory and Applications. Birkhauser, pp. 27-128, 2016.
O.I. Polikarovskykh, “High-speed digital frequency synthesizers based on Galois basis,” Proceedings of the 2013 23rd INSPEC International Crimean Conference on Microwave and Telecommunication Technology (CriMiCo), 2013, pp. 165-166.
O.I. Polikarovskykh, “The new type of phase accumulator for DDS,” Proceedings of the 2007 17th International Crimean Conference on Microwave and Telecommunication Technology (CriMiCo), 2007, pp. 267-268.
L.S. Jyothi “A novel DDS using nonlinear ROM addressing with improved compression ratio and quantization noise,” IEEE Transcations on Ultrasonics Ferroelectronics and Frequency Control, vol. 53, no. 2, pp. 274–283, 2006.
I. Koren, Computer Arithmetic Algorithms, second ed., A K Peters, Natick, MA, pp. 53-92 2002.
P.V. Ananda Mohan. “On RNS-base enhancements for direct digital frequency synthesis,” IEEE Transaction on Circuit and Systems-II, vol.48, no. 10, pp. 988–990, 2001.
P.E.C. Hoppes, “A radiation hardened low power numerically–controlled oscillator,” Proceedings of the IEEE 1982 Custom Integrated Circuits Conference, Rochester, New York, May 1982, pp.17–19.
W. A. Chren, Jr., “RNS-base enhancements for direct digital frequency synthesis,” IEEE Trans. Circuits Syst. II, vol. 42, pp. 516–524, 1995.
L.S. Jyothi, M. Ghosh, F.F Dai, R.C. Jaeger, “A novel DDS using nonlinear ROM addressing with improved compression ratio and quantization noise,” IEEE Transactions on Ultrasonics Ferroelectronics and Frequency Control, vol. 53, no. 2, 2006, pp. 274-283.
D.D. Caro and A.G. Strollo, “High-performance direct digital frequency synthesizers using piecewise-polynomial approximation,” IEEE Transaction on Circuit and Systems, vol. 52, no. 2, pp. 324–337, 2005.
Y. Yang, J. Cai, and L. Liu, “A novel DDS structure with low phase noise and spurs,” UESTC, Chengdu, 2011, pp. 302-306.
J. Valls, T. Sansaloni, A. P. Pascual, V. Torres and V. Almenar, “The use of CORDIC in software defined radios: A tutorial,” IEEE Communications. Magazine, vol. 44, no. 9, pp. 46–50, 2006.
Y. Park, N. I. Cho, “Fixed–point error analysis of CORDIC processor based on the variance propagation formula,” IEEE Transaction Circuits and System I,. vol. 51, no. 3, pp. 573–584, 2004.
E. Antelo, J. Villabla, E.L. Zapata, “Low–Latency Pipelined 2D and 3D CORDIC Processors,” IEEE Transaction on Computers, vol. 57, no. 3, 2008, pp. 404–417.
S.W. Mondwurf, “Versatile COFDM demodulation based on the CORDIC–algorithm,” IEEE Transaction on Consumer Electronics, vol. 48, no.3, pp. 718–723, 2002.
X. Geng, X. Yu, F. F. Dai, J. D. Irwin, and R. C. Jaeger, “An 11-bit 8.6 GHz direct digital synthesizer MMIC with 10-bit segmented nonlinear DAC,” Proceedings of the 34th Eur. Solid-State Circuits Conf. (ESSCIRC), Sep. 2008, pp. 362–365.
O. Abdelfattah, A. Swidan and Z. Zilic, “Direct residue-to-analogue conversion scheme based on Chinese remainder theorem,” Proceedings of the International Conference ICECS, 2010, pp. 687–690.
D. Radhakrishnan, A.P. Preethy, “A new approach to data conversion: direct analogue-to-residue converter,” Proceedings of the International Conference ICASSP-88, June 1998, vol. 5, pp. 3013–3016.
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